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A Multicore Computing Platform for Benchmarking Dynamic Partial Reconfiguration Based Designs

Thorndike, David Andrew

Abstract Details

2012, Master of Sciences (Engineering), Case Western Reserve University, EECS - Computer Engineering.
With the increasing application of multiple processor cores (multicores) within embedded system applications, as well as the pervasive utilization of the field-programmable gate array (FPGA), the embedded system development community has been exploring the advantages of the dynamically reconfigurable nature of FPGAs. Given size and power limitations, a primary motivation for this interest is to enable dynamic customization of hardware to optimize system performance for the various algorithms that a system encounters. This work presents a hardware based platform for studying dynamic reconfiguration of FPGAs in the context of multicore embedded systems. It also presents a methodology for developing the hardware and software for these systems. An important aspect of this work was to maximize the utilization of open source hardware and software intellectual property (IP). An example of the basic implementation flow is also provided, along with some benchmarking results.
Chritos Papachristou, PhD (Advisor)
Francis Merat, PhD (Committee Member)
Francis Wolff, PhD (Committee Member)
92 p.

Recommended Citations

Citations

  • Thorndike, D. A. (2012). A Multicore Computing Platform for Benchmarking Dynamic Partial Reconfiguration Based Designs [Master's thesis, Case Western Reserve University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=case1338933284

    APA Style (7th edition)

  • Thorndike, David. A Multicore Computing Platform for Benchmarking Dynamic Partial Reconfiguration Based Designs. 2012. Case Western Reserve University, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=case1338933284.

    MLA Style (8th edition)

  • Thorndike, David. "A Multicore Computing Platform for Benchmarking Dynamic Partial Reconfiguration Based Designs." Master's thesis, Case Western Reserve University, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=case1338933284

    Chicago Manual of Style (17th edition)