Skip to Main Content
 

Global Search Box

 
 
 

ETD Abstract Container

Abstract Header

Simulating Large Scale Memristor Based Crossbar for Neuromorphic Applications

Uppala, Roshni
http://orcid.org/0000-0002-2588-0812
http://rave.ohiolink.edu/etdc/view?acc_num=dayton1429296073

Abstract Details

2015, Master of Science (M.S.), University of Dayton, Electrical Engineering.
The memristor is a novel nano-scale device discovered in 2008. Memristors are basically nonvolatile variable resistors. Various breakthroughs of memristive devices have shown the potential of memristive crossbar designs for their ultra-high density and low-power memory. Initial studies have shown that memristor based neuromorphic processors could potentially consume 300,000 times less power than a traditional Intel Xeon Processor for neural network applications. These neuromorphic processors require large memristor arrays for evaluating neural networks. A key problem in designing these processors is simulating the large arrays of thousands of memristors as these simulations require extremely long times (sometimes weeks to months). Additionally, most existing simulation tools are unable to handle the large number of computations seen in these simulations. The simulations of these large arrays has not been examined in literature. One of the key objectives of this work is to evaluate large scale memristor crossbars that allow high density layout of synapses and thus enable building of highly capable neuromorphic systems. In order to achieve this, this study utilized a newly released parallel SPICE simulator, Xyce, developed by Sandia National Labs. Although it is 4 times faster than the existing SPICE simulators, Xyce is still too slow for evaluating the capabilities of large crossbar arrays. Therefore, this thesis also examines the development of an equivalent mathematical representation of the circuit level memristor based neuromorphic circuits for faster computation of the crossbars without the use of SPICE. This system is then used as an offline training approach to approximate the SPICE circuit. These trainings require thousands of iterations of the crossbar array. This thesis examined the training of memristor-based crossbars for neural network based and pattern recognition applications such as Image classification at the circuit level. Finally the analysis presented in this work will be crucial in understanding the future of the memristor-based crossbars in developing highly reliable and extremely low power processors and neuromorphic systems.
Tarek Taha (Committee Chair)
Guru Subramanyam (Committee Member)
Vijayan Asari (Committee Member)
97 p.
Computer Engineering; Electrical Engineering; Engineering
memristor; parallel simulation; neuromorphic computing; Xyce; approximate memristor model; offline training of memristor; pattern classification; face image classification; neural networks

Recommended Citations

Citations

  • Uppala, R. (2015). Simulating Large Scale Memristor Based Crossbar for Neuromorphic Applications [Master's thesis, University of Dayton]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1429296073

    APA Style (7th edition)

  • Uppala, Roshni. Simulating Large Scale Memristor Based Crossbar for Neuromorphic Applications . 2015. University of Dayton, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=dayton1429296073.

    MLA Style (8th edition)

  • Uppala, Roshni. "Simulating Large Scale Memristor Based Crossbar for Neuromorphic Applications ." Master's thesis, University of Dayton, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1429296073

    Chicago Manual of Style (17th edition)

dayton1429296073
3,550
© 2015, all rights reserved.
This open access ETD is published by University of Dayton and OhioLINK.