Skip to Main Content
 

Global Search Box

 
 
 
 

Files

File List


Dissertation_Fernando_Final.pdf (3.43 MB)

ETD Abstract Container

Abstract Header

Low Power, Dense Circuit Architectures and System Designs for Neural Networks using Emerging Memristors

Fernando, Baminahennadige Rasitha Dilanjana Xavier
http://orcid.org/0000-0003-4048-7696
http://rave.ohiolink.edu/etdc/view?acc_num=dayton1625595485590874

Abstract Details

2021, Doctor of Philosophy (Ph.D.), University of Dayton, Electrical and Computer Engineering.
Compact online learning architectures can be used to enhance internet of things devices, allowing them to learn directly on received data instead of sending data to a remote server for learning. This saves communication energy and enhances privacy and security, as the data is not shared. The memristor is a novel device with a wide range of resistance. Physical memristors have been arranged in a high-density grid called crossbar. A memristor crossbar circuit is a nano electronic device used for parallel computing memory technology and consumes very low power. It is a system on a chip (SoC), which is an integrated circuit that combines all essential components of a computer for neural network implementation. The memristor forms basic components of a neural network architecture. It can be used to accurately emulate a key part of human brain for learning process and memory storage. These memristor crossbar circuits are able to learn information using their physical properties. One of the key properties is that, it can perform weighted sum operation and weight update of a neural network in parallel. The objective of this dissertation is to develop and improve memristor circuit designs to bring them to reality. For this research, new types of memristor-based hardware for training and computing complex neural networks that consumes low energy and less surface area were developed. These devices would effectively save power and will greatly enhance the electrical and electronic technology in the US. The entire dissertation work is broken into four tasks. Task 1: A low power approach to implement the winner takes all algorithm, for self-organizing maps through a memristor crossbar-based circuit was examined. A novel neuron circuit was designed for the winning neuron detection and lateral inhibition operations. Task 2: A memristor based system for real-time intrusion detection, as well as an anomaly detection based on autoencoders was developed. Task 3: A 3D memristor based multicore architecture, where a mixed signal design capable of recognition as well as on-line learning was built. A novel technique for locally mapping different neural networks for different applications onto the multicore system was introduced. A 3D memristor architecture is one where several memristor crossbars are stacked vertically on top of each other to reduce the area footprint of a chip. Task 4: A fresh circuit was designed to answer the flaws of the op-amp circuit placed after a memristor crossbar. The experimental results show that the proposed system can yield results expected from theoretical applications. Improved memristor based devices are useful for many day-to-day applications, and complex applications using low power devices such as cell phones, robots, prosthetics and bio-medical devices. Memristor circuit devices also have capability of processing systems that produce tremendous amount of precise data that are analyzed to give more accurate output with low power and dense area SoC online/offline systems.
Tarek Taha (Committee Chair)
Guru Subramanyam (Committee Member)
Eric Balster (Committee Member)
Muhammad Usman (Committee Member)
182 p.
Electrical Engineering
Memristor crossbars; Neuromorphic computing; Operational amplifiers; Online training; Back-propagation

Recommended Citations

Citations

  • Fernando, B. R. D. X. (2021). Low Power, Dense Circuit Architectures and System Designs for Neural Networks using Emerging Memristors [Doctoral dissertation, University of Dayton]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1625595485590874

    APA Style (7th edition)

  • Fernando, Baminahennadige Rasitha. Low Power, Dense Circuit Architectures and System Designs for Neural Networks using Emerging Memristors. 2021. University of Dayton, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=dayton1625595485590874.

    MLA Style (8th edition)

  • Fernando, Baminahennadige Rasitha. "Low Power, Dense Circuit Architectures and System Designs for Neural Networks using Emerging Memristors." Doctoral dissertation, University of Dayton, 2021. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1625595485590874

    Chicago Manual of Style (17th edition)

dayton1625595485590874
57
© 2021, all rights reserved.
This open access ETD is published by University of Dayton and OhioLINK.