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Development of a decomposition approach for testing large analog circuits

Abstract Details

1989, Doctor of Philosophy (PhD), Ohio University, Electrical Engineering & Computer Science (Engineering and Technology).

The objective of this dissertation is to develop a new testing method for large scale circuits. This new method must be useful for functional testing and calibration of complex systems as well as identifying element characteristics and verifying macromodels or entire subsystems. It must also be able to diagnose faults and evaluate elements efficiently and reliably, while meeting the requirements of the automatic test system.

In order to realize this objective, a decomposition approach for testing large scale analog circuits was developed and testing strategies related to calibration, functional testing and fault diagnosis were established.

In the decomposition approach, the interconnected system was decomposed into a number of small subnetworks. To achieve this decomposition without breaking interconnections, voltage measurements were taken at the partition points and new test equations were formulated at these nodes. In this way the effects of the measurement errors were reduced to a local area, and computations were performed in each subcircuit. Subcircuit analysis was facilitated since the boundary conditions were determined by the measurement voltages. Thus, the speed and accuracy of the diagnosis process were improved. In order to fully understand the advantages of such an approach, we compared it with the sensitivity approach.

This dissertation proposed test strategies for fault diagnosis of large analog circuits. Taking the practical aspects into consideration, the developed method was modified so that it could be implemented in the real world. The practical aspects include determination of the test method and test environment, selection of test points, analysis of testability, prediction of the circuit's response, effect of measurement errors, elimination of ambiguity groups and estimation of time skew. The real test was implemented at the National Institute of Standards and Technology where experiment results verified effectiveness of the developed techniques.

The dissertation was organized as follows. First the general test methods and test procedure for element identification techniques were given. Then the sensitivity approaches, in DC, time and frequency domains was discussed, respectively. This research stemmed from the need to implement the sensitivity approach in a practical testing situation and to include it as software tools in circuit simulators. The discussion on the sensitivity approach served as an introduction to the decomposition approach, then the decomposition approach for testing large scale circuits was presented. The test equations were derived and the test procedures for DC testing, time domain testing and frequency domain testing were given. It was shown that the test matrix obtained by the decomposition approach had bordered block diagonal (BBD) structure thereby allowing sparse matrix and parallel processing techniques to be used to speed up computation in circuit simulation and fault diagnosis. Test strategies related to the practical aspects were proposed. The computer simulation and experimental results were given and the results obtained by the sensitivity approach and decomposition approach were compared.

The test method developed here can be used for testing custom integrated circuits (IC) such as analog/digital converters, filters, voltage regulators or operating amplifiers. It also can be applied to test VLSI neural networks or complicated mixed mode circuits that combine analog and digital functions. This method has a significant impact on system design, fabrication, maintenance, testing and repair stages. Voltage measurements taken during the testing play an active role in circuit simulation and diagnosis processes. Large systems can be tested without breaking the connections and all calculations can be implemented all calculations at the subsystem level. In design, the testing strategies provide design engineers with useful information so that they can make selected test points accessible.

Janusz Starzyk (Advisor)
183 p.

Recommended Citations

Citations

  • Dai, H. (1989). Development of a decomposition approach for testing large analog circuits [Doctoral dissertation, Ohio University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1172006982

    APA Style (7th edition)

  • Dai, Hong. Development of a decomposition approach for testing large analog circuits. 1989. Ohio University, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1172006982.

    MLA Style (8th edition)

  • Dai, Hong. "Development of a decomposition approach for testing large analog circuits." Doctoral dissertation, Ohio University, 1989. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1172006982

    Chicago Manual of Style (17th edition)