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RETUNES: Reliable and Energy-Ecient Network-on-Chip Architecture using Adaptive Routing and Approximate Communication

Bhamidipati, Padmaja
http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1554914045111913

Abstract Details

2019, Master of Science (MS), Ohio University, Electrical Engineering & Computer Science (Engineering and Technology).
As the number of processing cores are increasing in a chip multiprocessor (CMP), demand for an energy-efficient and reliable Network-on-Chip (NoC) architecture is increasing. However, the energy consumption of NoC continues to increase with the exponential growth in CMPs. Voltage scaling techniques such as Dynamic Voltage and Frequency Scaling (DVFS) and Near Threshold Voltage (NTV) scaling have been proposed to reduce the energy consumption of NoC by scaling the operating voltage and frequency in proportion to the application demand. Apart from DVFS and NTV scaling, recently, approximate communication has been proposed to boost the power savings and reduce latency in NoC for the applications that are not sensitive to imprecise results within an acceptable variance. As transistor technology is scaling down to a few nanometers, aging effects such as Hot Carrier Injection (HCI) and Negative Bias Temperature Instability (NBTI) are increasing which worsens the reliability. Scaling down the transistor size along with the supply voltage increases the susceptibility of NoC to soft errors. Faults and disturbances due to aging and voltage scaling cause serious degradation in reliability of NoC. In this thesis, I propose RETUNES - Reliable and energy-efficient NoC design, where power efficient and fault-tolerant architecture is modeled without compromising on the performance of NoC. The energy-efficient part of RETUNES is a five voltage/frequency design that includes NTV for high energy gains. The five voltage modes are switched according to the workload for high energy-efficiency and minimum network congestion in NoC. Energy efficiency of RETUNES is further improved by employing approximate communication throughout the execution of the application within the tolerable error range. The reliability part of RETUNES introduces a hybrid error correction model to handle the faults observed due to aging, voltage scaling, and temperature. In addition to error correction and detection, RETUNES handles uneven aging in NoC which is caused by uneven distribution of traffic. The adaptive routing algorithm is modeled to even out the non-uniform device wear-out and thereby, minimize the impact of aging in NoC. RETUNES decreases power consumption and threshold voltage variation (∆Vth) during low network load with high reliability and increases the network performance during high network load with reduced reliability. Simulation results of RETUNES demonstrated nearly 2.5X total power savings and a 3X improvement in Energy-Delay Product (EDP) of NoC for Splash-2 and PARSEC benchmarks on a 4 X 4 concentrated mesh architecture. Simulation results also showed a 13% decrease in the energy consumption of NoC, a 10% decrease in latency, and 19% EDP improvement by incorporating approximate communication technique.
Avinash Karanth (Advisor)
Savas Kaya (Committee Member)
Eric Stinaff (Committee Member)
Harsha Chenji (Committee Member)
92 p.
Electrical Engineering
Network-on-Chip; Energy efficiency; Reliability; Aging; Adaptive routing algorithm; Approximate communication; Near Threshold Voltage; NBTI; HCI

Recommended Citations

Citations

  • Bhamidipati, P. (2019). RETUNES: Reliable and Energy-Ecient Network-on-Chip Architecture using Adaptive Routing and Approximate Communication [Master's thesis, Ohio University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1554914045111913

    APA Style (7th edition)

  • Bhamidipati, Padmaja. RETUNES: Reliable and Energy-Ecient Network-on-Chip Architecture using Adaptive Routing and Approximate Communication. 2019. Ohio University, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1554914045111913.

    MLA Style (8th edition)

  • Bhamidipati, Padmaja. "RETUNES: Reliable and Energy-Ecient Network-on-Chip Architecture using Adaptive Routing and Approximate Communication." Master's thesis, Ohio University, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1554914045111913

    Chicago Manual of Style (17th edition)

ohiou1554914045111913
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This open access ETD is published by Ohio University and OhioLINK.