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A frequency synthesizer for multi-standard wireless applications

Ahn, Hong Jo
http://rave.ohiolink.edu/etdc/view?acc_num=osu1054488431

Abstract Details

2003, Doctor of Philosophy, Ohio State University, Electrical Engineering.
For the past years, great efforts have been made to implement a single chip transceiver for a target wireless system. More over, world-wide massivetransportations necessitate global communication methods. However, lots of different standards exist nowadays and a mobile unit for a certain standard can not be used for different standards. In order to cover various wireless systems, unless a new unified global communication standard is adopted, conventional systems need to be merged and evolve into a more complicated communication system called a "multi-standard'' transceiver. In a typical receiver architecture, incoming RF signals are multiplied by a local oscillator(LO) signal to obtain desired signals that might be either intermediate frequency(IF) signals or baseband signals. The local oscillator is practically an output signal of a frequency synthesizer. Conventional synthesizers can provide channel selection over a limited band due to limited division ratios of prescalers and voltage-controlled oscillator(VCO) operating frequency ranges. In this dissertation, a frequency synthesizer for multi-standard applications is presented. Based on a phase-locked loop, the synthesizer can provide various channel selection in order to comply with a designer's own frequency plan to cover multiple wireless standards. A fully programmable dual-modulus frequency divider is proposed with a new frequency division method to avoid division ratios that contain a decimal point. Newly developed PLL sub-blocks are presented. A new method to analyze and suppress effects of VCO pushing is introduced. Due to the difficulty in building a wide-band/multi-band LC-tank oscillator, a 900MHz band and tri-band single-ended voltage controlled oscillator(SE-VCRO) are built for the purpose of multi-band test even though they exhibit inferior phase noise performance to their LC-tank counterparts. A phase noise equation for a voltage-controlled oscillator is derived by modifying a phase noise equation from a linear time-varying(LTV) phase noise theory.The new phase noise equation can provide a designer with insights of phase noise information across the VCO's entire operating frequency range. The new SE-VCRO exhibits improved phase noise performance. A test chip (0.5um technology for 800MHz - 1.2GHz applications) is fabricated and partial experimental results are presented and discussed. Another version of the synthesizer is designed with 0.18um technology to cover 800 MHz - 2.4 GHz range and post layout simulation results are presented. The synthesizer is also compatible with a delta-sigma fractional-N architecture due to the fully programmable dual-modulus prescaler.
Mohammed Ismail (Advisor)
169 p.
PLL; frequency synthesizer; multi-standard receiver; wireless system; prescaler; frequency divider; VCO

Recommended Citations

Citations

  • Ahn, H. J. (2003). A frequency synthesizer for multi-standard wireless applications [Doctoral dissertation, Ohio State University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=osu1054488431

    APA Style (7th edition)

  • Ahn, Hong Jo. A frequency synthesizer for multi-standard wireless applications. 2003. Ohio State University, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=osu1054488431.

    MLA Style (8th edition)

  • Ahn, Hong Jo. "A frequency synthesizer for multi-standard wireless applications." Doctoral dissertation, Ohio State University, 2003. http://rave.ohiolink.edu/etdc/view?acc_num=osu1054488431

    Chicago Manual of Style (17th edition)

osu1054488431
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© 2003, all rights reserved.
This open access ETD is published by The Ohio State University and OhioLINK.