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A CMOS front end for high linearity zero-if WCDMA receiver

Alam, Shaikh Md. Khairul
http://rave.ohiolink.edu/etdc/view?acc_num=osu1164834218

Abstract Details

2006, Doctor of Philosophy, Ohio State University, Electrical Engineering.
This dissertation presents a single mode direct conversion receiver architecture and the corresponding CMOS front-end for low power consumption, small form factor, low noise figure and high linearity wide band code division multiple access (WCDMA) receiver in a TSMC 0.18-µm process. The front end comprises a novel differential low noise amplifier (LNA) and a novel down-conversion mixer. One of the major advantages of differential LNAs is that they are much less susceptible to common mode injected noise such as substrate noise. This is a very important issue in cases where the LNA is to be integrated with digital circuits that may generate in-band noise and interference. Also the leakage problem, where signals such as the LO couples to the antenna through the LNA input port, may be greatly alleviated by use of differential circuits. The proposed LNA has dual gain mode; low gain mode (LGM) and high gain mode (HGM). The variable gain LNA reduces the dynamic range requirement for the succeeding stages and also reduces the required gain of the baseband filter (BBF). The proposed down-conversion I/Q mixer structure is chosen to be a differential double balanced mixer for its inherited insensitivity to LO-IF isolation. It also suppresses common-mode substrate noise and interference. Also, this proposed topology reduces the power by up to 50 percent compared to a conventional down-conversion mixer. The undesired bondwire and package parasitics such as capacitors, inductors, and resistors are taken into account during the schematic design and layout. These undesired parasitics may affect the gain response and input impedance matching of the LNA and the gain and phase mismatch of the mixer. The proposed RF front-end is simulated with the Cadence SpectreRF simulator. Although it shows the degradation of the gain and the input impedance to some extent, the proposed front-end shows high linearity, low noise figure, very low corner frequency in the flicker noise, negligible gain mismatch and low power dissipation at 2 GHz frequency band.
Joanne DeGroat (Advisor)
130 p.
Analog RF-CMOS; direct conversion; front end; LNA; mixer; receiver; UMTS; WCDMA

Recommended Citations

Citations

  • Alam, S. M. K. (2006). A CMOS front end for high linearity zero-if WCDMA receiver [Doctoral dissertation, Ohio State University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=osu1164834218

    APA Style (7th edition)

  • Alam, Shaikh. A CMOS front end for high linearity zero-if WCDMA receiver. 2006. Ohio State University, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=osu1164834218.

    MLA Style (8th edition)

  • Alam, Shaikh. "A CMOS front end for high linearity zero-if WCDMA receiver." Doctoral dissertation, Ohio State University, 2006. http://rave.ohiolink.edu/etdc/view?acc_num=osu1164834218

    Chicago Manual of Style (17th edition)

osu1164834218
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© 2006, all rights reserved.
This open access ETD is published by The Ohio State University and OhioLINK.