The unique spectroscopic utility and high spatial resolution of terahertz (THz) waves
offer a new and vastly unexplored paradigm for novel
sensing, imaging, and communication applications, varying from
deep-space spectroscopy to security screening, from biomedical imaging to remote non-destructive inspection,
and from material characterization to multi-gigabit wireless indoor and outdoor communication networks.
To date, the THz frequency range,
lying between microwave and infrared bands, has been the last underexploited part of the electromagnetic (EM)
spectrum due to technical and economical limitations of classical electronics- and optics-based system implementations. However,
thanks to recent advancements in nano-fabrication and epitaxial growth techniques, sources and sensors
with cutoff frequencies reaching the submillimeter-wave (sub-mmW) band are now realizable.
Such remarkable improvement in electronic device speeds has been achieved mainly through aggressive scaling of
critical device features, such as the junction area for Schottky barrier diodes (SBDs), and
the gate length in high electron mobility transistors (HEMTs).
Such aggressively-scaled and refined device topologies can significantly enhance
the intrinsic device capabilities, however, the overall device performance is still limited by the
parasitic couplings associated with device interconnect metallization.
Consequently, geometry- and material-dependent parasitic couplings, induced by
EM field interactions within the device structure, exacerbate the performance and diminish the gains
achieved by the improved intrinsic device behavior. In particular, as the operation frequency approaches
the THz barrier, device dimensions become comparable to signal wavelength.
The main objective of this dissertation is to develop accurate lumped- and distributed-element
equivalent circuits, and full-wave EM simulation-based iterative parameter extraction algorithms,
to accurately model the extrinsic parasitics of electronic devices at THz frequencies.
First, we demonstrate and characterize the EM coupling effects that restrict the THz detection and mixing performance of
zero-bias surface-channel sub-mmW SBDs. This is achieved by a distributed equivalent circuit model to account for the
wave propagation phenomena along the device air bridge in the 10 GHz - 1.1 THz band.
The major power dissipation mechanisms of THz Schottky barrier diodes,
including semiconducting substrate losses, leaky passivation dielectric losses, conductive metallization losses, and losses due to
increased series resistance of epitaxial and buffer layers are incorporated into the proposed equivalent
circuit model. Based on this new "parasitic-aware" circuit model, we present a novel multi-step systematic parameter extraction algorithm.
The accuracy of the developed extraction procedure is validated through comparisons with the experimental data reported in the literature.
More importantly, the shortcomings of conventional lumped-element circuits for THz diode modeling and the broadband accuracy achieved by the proposed distributed circuit model are illustrated through
comparisons with full-wave simulated frequency response of the device in THz band.
Key parasitic components that are most detrimental to the performance are identified, and a method to optimize device performance using the equivalent circuit model is demonstrated.
In addition, we demonstrate over 10 dB improvement in conversion efficiency for a diode-based single-ended passive mixer at 1 THz through optimization of diode geometry.
We next focus on three-terminal devices, and utilize full-wave EM simulation tools for characterization of extrinsic parasitics of millimeter-wave (mmW) HEMTs.
Subsequently, we develop a lumped-element parasitic equivalent circuit model for HEMTs in the mmW band. Based on this lumped circuit model,
we develop a new multi-step systematic model extraction algorithm to determine the components of the equivalent circuit. For the first time, an analytical procedure
for measurement-based estimation of gate-to-drain mutual inductance is developed.
We also show that this mutual inductance is detrimental to device operation due to the inductive feedback path it creates at mmW frequencies.
The accuracy and robustness of the
suggested algorithm are verified through comparisons between simulated, measured, and modeled frequency responses of the
designed test standards up to 325 GHz. As such, we show that the proposed lumped parasitic equivalent circuit
achieves broadband accuracy in mmW band. The adverse impacts of EM interactions on gain and noise performance
are also evaluated. Major parasitic components that are most detrimental to the mmW performance are identified, and
conveniently optimized via subsequent circuit analysis.
As a result, design guidelines are provided for optimum device geometry to achieve the maximum
speed and best noise performance.
We also demonstrate via full-wave EM simulations that around 20% improvement in
maximum oscillation frequency, 20% reduction in minimum noise figure, and
10% increase in associated power gain at 20 GHz are concurrently achievable through optimization of number of gate fingers, and gate finger width.
To further expand the equivalent circuit of HEMTs beyond the mmW band into THz frequencies,
we present a distributed parasitic equivalent circuit model to account for the
wave propagation effects along the gate width of HEMTs.
This is achieved by developing a multi-step systematic parameter extraction algorithm, which accounts for
the external parasitics of device metallization, that are comparable in size to operating wavelength.
The accuracy of the proposed extraction procedure is again validated through
full-wave (FW) simulations, measurements, and circuit model responses up to 750 GHz.
This distributed HEMT model is utilized to evalute the adverse impact of extrinsic parasitic couplings
on device speed and noise performance.
Key parasitic components are
identified, and redesigned using the equivalent distributed circuit.
As a result, design guidelines are developed for optimum device layout selection to accomplish the highest speed and
noise performance. As an example, we demonstrate 10% improvement in
maximum oscillation frequency, 10% reduction in minimum noise figure, and
5% increase in associated power gain at 50 GHz via optimization of
device gate finger number, and unit finger width.
This dissertation demonstrates the utility of full-wave EM simulation tools as an alternative to fabrication and measurement-based
equivalent circuit models. As such, the proposed approach is a convenient and cost-effective
solution to the problem of device modeling in THz frequency range.
Through the proposed full-wave EM simulation-based characterization and performance optimization
methodology, RF engineers can determine the optimum layout for the diodes and transistors used
in a variety of integrated circuit applications, including low-noise amplifiers, voltage-controlled oscillators,
power amplifiers, and mixers.