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Optimization of The Fabrication Condition of RF Sputtered ZnO Thin Film Transistors with High-k HfO2 Gate Dielectric

Thapaliya, Prem S
http://rave.ohiolink.edu/etdc/view?acc_num=toledo1452258637

Abstract Details

2016, Doctor of Philosophy, University of Toledo, Electrical Engineering.
Conventional amorphous silicon based thin film transistors have been the most widely used ones for flat panel display application during the last two decades. However, the low mobility of less than 1 cm2/Vs and light induced instability of the amorphous silicon based thin film transistor make them unsuitable for high resolution displays. Oxide based thin film transistors have attracted a great deal of interest as an alternative to conventional amorphous silicon based thin film transistors for high resolution display applications. In particular, ZnO has gained considerable interest for the next generation transparent and flexible display due to its wide band gap of 3.37 eV, high electron mobility and low temperature deposition forming good quality of polycrystalline film even at room temperature. Consequently all the aforementioned features of ZnO make them promising channel material for the flexible and transparent TFTs. The electrical characteristics of ZnO based TFTs is greatly affected by the deposition condition and hence crystalline quality of channel layer, thickness of channel layer and quality of interface between the gate dielectric and the channel layer. Therefore, the deposition temperature and the thickness of the ZnO channel needs to be optimized in order to achieve high performance ZnO TFTs. Moreover, the quality of interface between the ZnO channel layer and the gate dielectric is of vital importance to improve the performance of the TFTs. In this dissertation, we have fabricated and characterized RF sputtered ZnO based thin film transistor using high-k HfO2 gate dielectric. The transparent ZnO TFTs was realized using FTO as a transparent gate electrode as opposed to commonly used ITO gate electrode. It was found that TFTs fabricated using the FTO gate electrode showed lower mobility and on/off ratio compared to the TFTs with Ru as a gate on the Si substrate. This deterioration of TFTs performance with the use of FTO gate electrode was attributed to the degradation of HfO2 gate dielectric due to the diffusion of fluorine from the FTO into the HfO2 during its deposition at 300 oC. In order to minimize the interface trap density at the interface between the ZnO and HfO2, an interfacial layer of MgO with different thickness was investigated. It was found that 10 nm MgO is an optimum thickness that can reduce the interface trap density by almost one order of magnitude and hence exhibit the best TFTs performance with field effect mobility, threshold voltage, on/off ratio and subthreshold swing to be 0.3 cm2/V.s, 3.7 V , 106 and 1.35 V/decade respectively. The decrease in the interface trap density with the interfacial layer was attributed to the reduction of defects in the ZnO by the excess oxygen ions of MgO. Furthermore, the ZnO channel layer was deposited at different temperature including room temperature, 50 oC, 100 oC and 200 oC, to determine the optimum deposition temperature that can achieve high performance ZnO TFTs. It was found that ZnO deposited at 50 oC showed the best TFT performance with field effect mobility, threshold voltage, on off ratio and subthreshold swing 1.12 cm2/V.s, 5.8 V, 1.4×105, 1.35 V/decade respectively. The improvement in the performance of the TFTs device with 50 oC ZnO was attributed to the low surface roughness of ZnO film, increased grain size and good polycrystalline quality which was confirmed with the help of XRD, AFM and SEM measurement of ZnO thin film deposited at different temperature. Likewise, once the optimum deposition temperature of ZnO was determined, the effect of ZnO thickness was investigated by depositing the ZnO with different thickness including 30 nm, 50 nm, 70 nm and 100 nm while maintaining the deposition temperature of ZnO to be at 50 oC. It was found that the TFTs device with 50 nm exhibit the superior performance over the other thicknesses of ZnO which was ascribed to the improved polycrystalline quality, low surface roughness of the 50 nm ZnO thin film.
Rashmi Jha (Committee Chair)
Christopher Melkonian (Committee Member)
Mansoor Alam (Committee Member)
Nickolas Podraza (Committee Member)
Yanfa Yan (Committee Member)
183 p.
Electrical Engineering

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Citations

  • Thapaliya, P. S. (2016). Optimization of The Fabrication Condition of RF Sputtered ZnO Thin Film Transistors with High-k HfO2 Gate Dielectric [Doctoral dissertation, University of Toledo]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1452258637

    APA Style (7th edition)

  • Thapaliya, Prem. Optimization of The Fabrication Condition of RF Sputtered ZnO Thin Film Transistors with High-k HfO2 Gate Dielectric. 2016. University of Toledo, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=toledo1452258637.

    MLA Style (8th edition)

  • Thapaliya, Prem. "Optimization of The Fabrication Condition of RF Sputtered ZnO Thin Film Transistors with High-k HfO2 Gate Dielectric." Doctoral dissertation, University of Toledo, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1452258637

    Chicago Manual of Style (17th edition)

toledo1452258637
697
© 2016, some rights reserved.Creative Commons License Optimization of The Fabrication Condition of RF Sputtered ZnO Thin Film Transistors with High-k HfO2 Gate Dielectric by Prem S Thapaliya is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 3.0 Unported License. Based on a work at etd.ohiolink.edu.
This open access ETD is published by University of Toledo and OhioLINK.