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Design and Implementation of a Second Generation Logic Cluster for Multi-Technology Field Programmable Gate Arrays

Chadha, Vishal
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1126539992

Abstract Details

2005, MS, University of Cincinnati, Engineering : Computer Engineering.
One limitation of current FPGAs is that the user is limited to strictly digital electronic designs and are not suitable for multi-technology applications. In 2002, the novel idea of a Multi-technology Field Programmable Gate Array was proposed to extend the flexibility and reusability benefits of conventional FPGAs into multi-technology domain. But the chip design done for that work was not well suited for implementations in modern systems and was not compatible with modern CAD resources. Further, digital logic clusters did not include a dedicated carry-chain for arithmetic operations as in many FPGAs. In this thesis, research has been done to make the Multi-Technology Logic Cluster design much faster, smaller and versatile by using improved process technology, floorplanning and data processing capabilities so that these components match the performance expected from current applications. Hence, this is the next step in evolution of MT-FPGAs to provide high-performance solutions for complex applications.
Dr. Fred Beyette Jr. (Advisor)
84 p.
ASIC; Application specific integrated circuit; CMOS; Complementary Metal Oxide Semiconductor. Technology used to manufacture silicon; integrated circuits; Delay flip-flop or D-flop; The input is copied to the output delayed by one clock cycle; FPGA

Recommended Citations

Citations

  • Chadha, V. (2005). Design and Implementation of a Second Generation Logic Cluster for Multi-Technology Field Programmable Gate Arrays [Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1126539992

    APA Style (7th edition)

  • Chadha, Vishal. Design and Implementation of a Second Generation Logic Cluster for Multi-Technology Field Programmable Gate Arrays. 2005. University of Cincinnati, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1126539992.

    MLA Style (8th edition)

  • Chadha, Vishal. "Design and Implementation of a Second Generation Logic Cluster for Multi-Technology Field Programmable Gate Arrays." Master's thesis, University of Cincinnati, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1126539992

    Chicago Manual of Style (17th edition)

ucin1126539992
593
© 2005, all rights reserved.
This open access ETD is published by University of Cincinnati and OhioLINK.