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ucin1152144532.pdf (1 MB)
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Abstract Header
MODELING AND SIMULATION OF CLOCK DISTRIBUTION NETWORKS USING DELAY-LOCKED LOOPS
Author Info
RAVI, MAHESWARI S
Permalink:
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1152144532
Abstract Details
Year and Degree
2006, MS, University of Cincinnati, Engineering : Computer Engineering.
Abstract
With the advancement of nanometer scale processes in CMOS technologies, the demand for high performance VLSI systems continues to grow exponentially. The performance of a microprocessor is influenced by its clock distribution network. Clock skew penalizes the overall performance of the system. The task of minimizing clock skew in clock distribution networks continues to be critical in high speed circuits to maximize system performance. The objective of this research is to design a low skew clock distribution network by inserting Delay-Locked Loops with buffers along different clock paths of the clock distribution network. The delay-locked loops use delay lines which produce significantly lower skew and jitter than phase-locked loops. Clock skew can be reduced by employing DLLs in several appropriate places of the clock distribution network. The approach of distributing DLLs in a clock distribution network requires additional area but greatly improves the performance of VLSI systems.
Committee
Dr. Harold Carter (Advisor)
Pages
74 p.
Keywords
Clock Distribution Networks
;
Delay-Locked Loops
;
Buffers
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Citations
RAVI, M. S. (2006).
MODELING AND SIMULATION OF CLOCK DISTRIBUTION NETWORKS USING DELAY-LOCKED LOOPS
[Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1152144532
APA Style (7th edition)
RAVI, MAHESWARI.
MODELING AND SIMULATION OF CLOCK DISTRIBUTION NETWORKS USING DELAY-LOCKED LOOPS.
2006. University of Cincinnati, Master's thesis.
OhioLINK Electronic Theses and Dissertations Center
, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1152144532.
MLA Style (8th edition)
RAVI, MAHESWARI. "MODELING AND SIMULATION OF CLOCK DISTRIBUTION NETWORKS USING DELAY-LOCKED LOOPS." Master's thesis, University of Cincinnati, 2006. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1152144532
Chicago Manual of Style (17th edition)
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Document number:
ucin1152144532
Download Count:
882
Copyright Info
© 2006, all rights reserved.
This open access ETD is published by University of Cincinnati and OhioLINK.