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REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS

RAMMOHAN, SRIVIDHYA
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1179459225

Abstract Details

2007, MS, University of Cincinnati, Engineering : Computer Engineering.
In recent times, many embedded applications such as mobile phones, smart-cards, etc. use cryptographic devices that use a secret key to encrypt sensitive data to secure it. Encryption algorithms are often challenged during physical implementation (ICs), providing key information to the attackers. Differential Power Analysis (DPA) is a power attack technique uses the difference in power consumed by each input data in conjunction with statistical analysis to extract statistical information that correlates power consumption to the secret key. Our goal is to present a Dynamic Differential Logic style whose power consumption is input independent and which reuses part of circuit to generate differential output. The logic style proposed by us, Reduced Complementary Dynamic and Differential logic (RCDDL) style helps achieve increased DPA resistance with 31.66% improvement in security strength, 14% reduction in power and 7.75% reduction in area on an average when compared to other existing logic styles.
Dr. Ranga Vemuri (Advisor)
164 p.
Differential Power Analysis (DPA) Attacks; Secret Key; Dynamic Differential Logic; Side-Channel Attacks

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Citations

  • RAMMOHAN, S. (2007). REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS [Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1179459225

    APA Style (7th edition)

  • RAMMOHAN, SRIVIDHYA. REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS. 2007. University of Cincinnati, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1179459225.

    MLA Style (8th edition)

  • RAMMOHAN, SRIVIDHYA. "REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS." Master's thesis, University of Cincinnati, 2007. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1179459225

    Chicago Manual of Style (17th edition)

ucin1179459225
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© 2007, all rights reserved.
This open access ETD is published by University of Cincinnati and OhioLINK.