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Simulation and Design of InAs Nanowire Transistors Using Ballistic Transport

Myers Riggs, Rhonda Renee
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1192729325

Abstract Details

2005, MS, University of Cincinnati, Engineering : Electrical Engineering.
The purpose of this thesis is to describe the modeling of the performance of InAs nanowire MOSFETs and to study their performance as parameter of the transistor’s structure (e.g., diameter, gate dielectric thickness, and gate dielectric constant) were changed. This study was performed using the FETToy (www.nanohub.org) modeling software [35, 36] developed at Purdue University. FETToy is composed of several Matlab scripts and is used to simulate ballistic transport in the calculation of the current-voltage (I-V) characteristics for nanoscale double gate silicon MOSFETs. By modifying the semiconductor’s effective mass, the program can be used to model semiconductors other than silicon. This thesis presents in Chapter 2 the initial modeling results for an InAs nanowire MOSFET in comparison with the published experimental results for a 80 nm diameter nanowire MOSFET as reported by Bryllert et al.’s (Sweden) group [23, 24]. Comparisons were made of the simulation results to the experimental results for the transistor’s drain current versus gate voltage to extract the threshold voltage, the transistor’s output characteristics (drain current versus drain bias for various gate voltages), the log of the drain current versus the gate voltage (subthreshold plot), and the transconductance versus gate voltage for a drain voltage in the saturation region. Chapter 3 describes the results obtained from varying the transistor’s structure from the initial one used in Chapter 2 to compare with the published experimental results. This includes the effects on transistor performance of variation in the nanowire diameter, gate dielectric thickness, and gate dielectric constant. This chapter also pursues the optimization of the device’s performance by altering the device’s structure. We conclude this thesis by summarizing the work presented here and offering suggestions for future work.
Dr. Kenneth Roenker (Advisor)
109 p.
Nanowire; Device modeling; Simulation; Indium Arsenide

Recommended Citations

Citations

  • Myers Riggs, R. R. (2005). Simulation and Design of InAs Nanowire Transistors Using Ballistic Transport [Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1192729325

    APA Style (7th edition)

  • Myers Riggs, Rhonda. Simulation and Design of InAs Nanowire Transistors Using Ballistic Transport. 2005. University of Cincinnati, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1192729325.

    MLA Style (8th edition)

  • Myers Riggs, Rhonda. "Simulation and Design of InAs Nanowire Transistors Using Ballistic Transport." Master's thesis, University of Cincinnati, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1192729325

    Chicago Manual of Style (17th edition)

ucin1192729325
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© 2007, all rights reserved.
This open access ETD is published by University of Cincinnati and OhioLINK.