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A heuristic approach for Capacitive Crosstalk Avoidance during Post Global Routing Crosstalk Synthesis for Deep Submicron Technologies

ARUMUGAM, THIAGARAJAN

Abstract Details

2008, MS, University of Cincinnati, Engineering : Computer Engineering.
With decreasing feature sizes, higher clock rates and increasing interconnect densities, crosstalk has become a major concern in Integrated Circuit (IC) design [1]. Crosstalk optimization is usually performed during placement, global routing and detailed routing. In order to achieve accuracy and flexibility, previous approaches proposed an intermediate step between global routing and detailed routing to perform the crosstalk synthesis. In this work, we present techniques to improve upon the existing capacitive crosstalk aware router developed in [2] which uses a post global routing crosstalk synthesis step to perform crosstalk estimation and reduction. We propose a new approach to automate the process of identifying the amount of crosstalk sensitivity between the nets. Our objective function (noise margin) also significantly reduces the computation time. Finally, we arrive at a crosstalk-free net order for each region of the chip which serves as a good starting point for a detailed router.
Dr. Harold Carter (Advisor)
97 p.

Recommended Citations

Citations

  • ARUMUGAM, T. (2008). A heuristic approach for Capacitive Crosstalk Avoidance during Post Global Routing Crosstalk Synthesis for Deep Submicron Technologies [Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1204214738

    APA Style (7th edition)

  • ARUMUGAM, THIAGARAJAN. A heuristic approach for Capacitive Crosstalk Avoidance during Post Global Routing Crosstalk Synthesis for Deep Submicron Technologies. 2008. University of Cincinnati, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1204214738.

    MLA Style (8th edition)

  • ARUMUGAM, THIAGARAJAN. "A heuristic approach for Capacitive Crosstalk Avoidance during Post Global Routing Crosstalk Synthesis for Deep Submicron Technologies." Master's thesis, University of Cincinnati, 2008. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1204214738

    Chicago Manual of Style (17th edition)