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6969.pdf (4.07 MB)
ETD Abstract Container
Abstract Header
An Arbitrary Precision Integer Arithmetic Library for FPGA s
Author Info
Kalathungal, Akhil, M.S.
Permalink:
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1383812278
Abstract Details
Year and Degree
2013, MS, University of Cincinnati, Engineering and Applied Science: Computer Engineering.
Abstract
In computer science, arbitrary precision integer arithmetic (also called multiple precision arithmetic, bignum arithmetic) indicates that calculations are performed on numbers in which digits of precision are limited only by the available memory of the host system. A common application is public-key cryptography whose algorithms commonly employ arithmetic with integers having hundreds of digits. The intent of this thesis work is to support application programmers using FPGAs with an arbitrary precision (integer) arithmetic logic so that a user can implement cryptographic algorithms like RSA, AES etc. An application programmer who uses an FPGA based embedded processor can use the underlying hardware modules which are developed for doing the arbitrary precision operations. This thesis covers the back end of the arbitrary precision library which includes the library wrapper and the underlying arithmetic and logic unit. Algorithms have been implemented for the four basic operations: addition, subtraction, multiplication and division for multiple precision numbers. The hardware description language used to implement the library is Verilog. Test benches have been developed to test the functionality of the library and all the corner cases for the inputs have been covered with respect to verification of the output values. The library communicates with memory modules at input and output. The memory modules are on chip RAM modules; the input RAM module is used to store the two multiple precision input operands and the output RAM module is used to store the output result. The basic data chunk size of the library is selected to be 32 bits. A comparative study has been done for three different library sizes of 32 bits, 64 bits, and 96 bits for the parameters area, power and time. Also a user manual for the arbitrary precision library has been developed. Since the hardware is implemented in Verilog, this design can be used for an FPGA or even a full custom ASIC that the library code can be synthesized onto.
Committee
Carla Purdy, Ph.D. (Committee Chair)
Raj Bhatnagar, Ph.D. (Committee Member)
George Purdy, Ph.D. (Committee Member)
Pages
135 p.
Subject Headings
Computer Engineering
Keywords
FPGA
;
Arbitrary Precision Integer Arithmetic
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Citations
Kalathungal, A. (2013).
An Arbitrary Precision Integer Arithmetic Library for FPGA s
[Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1383812278
APA Style (7th edition)
Kalathungal, Akhil.
An Arbitrary Precision Integer Arithmetic Library for FPGA s.
2013. University of Cincinnati, Master's thesis.
OhioLINK Electronic Theses and Dissertations Center
, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1383812278.
MLA Style (8th edition)
Kalathungal, Akhil. "An Arbitrary Precision Integer Arithmetic Library for FPGA s." Master's thesis, University of Cincinnati, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1383812278
Chicago Manual of Style (17th edition)
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Document number:
ucin1383812278
Download Count:
802
Copyright Info
© 2013, all rights reserved.
This open access ETD is published by University of Cincinnati and OhioLINK.