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A Performance Driven Placement System Using an Integrated Timing Analysis Engine

Peter, Shaun K
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1406820542

Abstract Details

2014, MS, University of Cincinnati, Engineering and Applied Science: Computer Engineering.
With the increase in design sizes the physical design of VLSI circuits continues to become more challenging. Achieving timing closure on such large designs with tight timing, area, power and design rule constraints is a difficult task. It is therefore important to come up with a placement which addresses these constraints to a good extent in order to facilitate timing closure. Popular placement algorithms like analytic placement rely on total wire length as a metric to optimize placement. But total wire length is not an accurate measure of critical path delay and the resulting placement may not meet timing requirements. Timing driven placers try to address this issue by incorporating a more complex metric that takes into account the timing requirements. But most of these approaches are either restricted to detailed placement or the timing information supplied is not sufficient or accurate enough. In this work we come up with a timing driven placement system that incorporates a relatively fast and accurate incremental timing engine with a placement engine. We show that starting with an unplaced netlist, using the information from the timer, we can produce placements which give better timing results post routing compared to wire length based placement. Although it is at a cost of some runtime, the better post routing results could give an overall better turnaround time as the number of iterations through the physical design flow could be reduced.
Ranganadha Vemuri, Ph.D. (Committee Chair)
Wen Ben Jone, Ph.D. (Committee Member)
Carla Purdy, Ph.D. (Committee Member)
70 p.
Computer Engineering
VLSI circuits

Recommended Citations

Citations

  • Peter, S. K. (2014). A Performance Driven Placement System Using an Integrated Timing Analysis Engine [Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1406820542

    APA Style (7th edition)

  • Peter, Shaun. A Performance Driven Placement System Using an Integrated Timing Analysis Engine. 2014. University of Cincinnati, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1406820542.

    MLA Style (8th edition)

  • Peter, Shaun. "A Performance Driven Placement System Using an Integrated Timing Analysis Engine." Master's thesis, University of Cincinnati, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1406820542

    Chicago Manual of Style (17th edition)

ucin1406820542
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© 2014, all rights reserved.
This open access ETD is published by University of Cincinnati and OhioLINK.