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wright1220469397.pdf (2.32 MB)
ETD Abstract Container
Abstract Header
Design of a CMOS RF front end receiver in 0.18μm technology
Author Info
Sastry, Vishwas Kudur
Permalink:
http://rave.ohiolink.edu/etdc/view?acc_num=wright1220469397
Abstract Details
Year and Degree
2008, Master of Science in Engineering (MSEgr), Wright State University, Electrical Engineering.
Abstract
An RF front end receiver system refers to the analog down conversion stages of the wireless communication system. The Digital base-band signals cannot be transmitted directly through wireless channels due to the properties of electromagnetic waves. The baseband signals need to be converted to analog through a digital-to-analog converter (DAC), up converted to higher frequency using an up conversion mixer and then transmitted through the channel. The received signals are down converted to base band frequency and then converted to digital again using the analog to digital converter (ADC). The processes which the analog signal undergoes at the RF front end include amplification, mixing and filtering.The RF Front End receiver developed in this thesis makes use of a differential low noise amplifier (LNA) with center frequency at 1.75GHz.The incoming RF signal undergoes amplification by the LNA and is down converted by a Gilbert double balanced mixer to a first Intermediate frequency (IF) of 250 MHz A second Gilbert Double Balanced Mixer down converts to a low second IF of 50 MHz The local oscillator signal for the mixer is generated using a voltage controlled ring oscillator (VCO).The entire front end of the receiver was created in Cadence virtuoso schematic editor using CMOS 0.18μm technology. The total power consumed by the RF Front End Receiver is 113.36 mW.
Committee
Raymond E. Siferd, PhD (Advisor)
Chein-In Henry Chen, PhD (Committee Member)
Marian K. Kazimierczuk, PhD (Committee Member)
Pages
77 p.
Subject Headings
Communication
;
Electrical Engineering
Keywords
CMOS
;
RF Receiver
;
LNA
;
MIxer
;
VCO
;
Front End
;
Low IF Receiver
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Refworks
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Citations
Sastry, V. K. (2008).
Design of a CMOS RF front end receiver in 0.18μm technology
[Master's thesis, Wright State University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=wright1220469397
APA Style (7th edition)
Sastry, Vishwas.
Design of a CMOS RF front end receiver in 0.18μm technology.
2008. Wright State University, Master's thesis.
OhioLINK Electronic Theses and Dissertations Center
, http://rave.ohiolink.edu/etdc/view?acc_num=wright1220469397.
MLA Style (8th edition)
Sastry, Vishwas. "Design of a CMOS RF front end receiver in 0.18μm technology." Master's thesis, Wright State University, 2008. http://rave.ohiolink.edu/etdc/view?acc_num=wright1220469397
Chicago Manual of Style (17th edition)
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Document number:
wright1220469397
Download Count:
3,441
Copyright Info
© 2008, all rights reserved.
This open access ETD is published by Wright State University and OhioLINK.