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A 13T Single-Ended Low Power SRAM Using Schmitt-Trigger and Write-Assist.pdf (2.1 MB)
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A 13T Single-Ended Low Power SRAM Using Schmitt-Trigger and Write-Assist
Author Info
Namala, Praneeth
Permalink:
http://rave.ohiolink.edu/etdc/view?acc_num=wright1504191949021882
Abstract Details
Year and Degree
2017, Master of Science in Electrical Engineering (MSEE), Wright State University, Electrical Engineering.
Abstract
SRAMs are widely used in application based systems like medical instruments, portable electronic devices from caches to registers. Technology scaling of transistor into nanometer regime has substantially increased memory density that occupies large silicon area in today’s IC’s and consumes significant amount of active and leakage power. So, design requirements and challenges such as memory write and read speed, leakage power, noise margin and process-voltage-temperature (PVT) variations also significantly increase. In this thesis, a 13T single-ended low power SRAM using Schmitt-Trigger and write-assist technique is presented. It enhances read static noise margin, write-1 and read-0 access time, specifically at low supply voltages. Designed in 1.05V 32 nanometer CMOS process, employing a Schmitt-Trigger in SRAM design achieves a higher read static noise margin (RSNM) of 3.65x and 1.79x as that of the standard 6T and conventional 8T SRAM, respectively. The read port configuration used in this SRAM design reduces about 50% of the Read-Bit-Line (RBL) leakage from un-accessed memory cells as compared with conventional 8T SRAM. The SRAM functions successfully with a minimum VDD of 340 mV, 100 mV lower than the threshold voltage so as to consume extremely low power.
Committee
Chien-In Henry Chen, Ph.D. (Advisor)
Yan Zhuang, Ph.D. (Committee Member)
Jiafeng Xie, Ph.D. (Committee Member)
Pages
55 p.
Subject Headings
Electrical Engineering
Keywords
electrical engineering
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Citations
Namala, P. (2017).
A 13T Single-Ended Low Power SRAM Using Schmitt-Trigger and Write-Assist
[Master's thesis, Wright State University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=wright1504191949021882
APA Style (7th edition)
Namala, Praneeth.
A 13T Single-Ended Low Power SRAM Using Schmitt-Trigger and Write-Assist.
2017. Wright State University, Master's thesis.
OhioLINK Electronic Theses and Dissertations Center
, http://rave.ohiolink.edu/etdc/view?acc_num=wright1504191949021882.
MLA Style (8th edition)
Namala, Praneeth. "A 13T Single-Ended Low Power SRAM Using Schmitt-Trigger and Write-Assist." Master's thesis, Wright State University, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=wright1504191949021882
Chicago Manual of Style (17th edition)
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Document number:
wright1504191949021882
Download Count:
1,615
Copyright Info
© 2017, some rights reserved.
A 13T Single-Ended Low Power SRAM Using Schmitt-Trigger and Write-Assist by Praneeth Namala is licensed under a Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported License. Based on a work at etd.ohiolink.edu.
This open access ETD is published by Wright State University and OhioLINK.