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Matthew_Harris_Thesis_4_2019.pdf (990.57 KB)

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Accelerating Reverse Engineering Image Processing Using FPGA

Harris, Matthew Joshua
http://rave.ohiolink.edu/etdc/view?acc_num=wright155535529307322

Abstract Details

2019, Master of Science in Cyber Security (M.S.C.S.), Wright State University, Computer Engineering.
In recent decades, field programmable gate arrays (FPGAs) have evolved beyond simple, expensive computational components with minimal computing power to complex, inexpensive computational engines. Today, FPGAs can perform algorithmically complex problems with improved performance compared to sequential CPUs by taking advantage of parallelization. This concept can be readily applied to the computationally dense field of image manipulation and analysis. Processed on a standard CPU, image manipulation suffers with large image sets processed by highly sequential algorithms, but by carefully adhering to data dependencies, parallelized FPGA functions or kernels offer the possibility of significant improvement through threaded CPU functions. This thesis will examine the possibilities of moving a program featuring several image manipulation and analysis operations to a hardware/software build on a modern FPGA. The paper will focus on the implementation and performance improvements of the proposed method as well as the results of moving portions of the program to FPGA hardware.
John M. Emmert, Ph.D. (Committee Chair)
Michael Raymer, Ph.D. (Committee Co-Chair)
Travis Doom, Ph.D. (Committee Member)
69 p.
Computer Engineering
FPGA; OpenCV; Image Stitching; image matching; reverse engineering; multimodal matching; hardware Trojans; hardware Trojan detection; integrated circuit

Recommended Citations

Citations

  • Harris, M. J. (2019). Accelerating Reverse Engineering Image Processing Using FPGA [Master's thesis, Wright State University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=wright155535529307322

    APA Style (7th edition)

  • Harris, Matthew. Accelerating Reverse Engineering Image Processing Using FPGA. 2019. Wright State University, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=wright155535529307322.

    MLA Style (8th edition)

  • Harris, Matthew. "Accelerating Reverse Engineering Image Processing Using FPGA." Master's thesis, Wright State University, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=wright155535529307322

    Chicago Manual of Style (17th edition)

wright155535529307322
789
© 2019, some rights reserved.Creative Commons License Accelerating Reverse Engineering Image Processing Using FPGA by Matthew Joshua Harris is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 3.0 Unported License. Based on a work at etd.ohiolink.edu.
This open access ETD is published by Wright State University and OhioLINK.