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Design and Implementation of Fully Integrated CMOS On-chip Bandpass Filter with Wideband High-Gain Low Noise Amplifier

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2021, Doctor of Philosophy (PhD), Wright State University, Electrical Engineering.
Current trends of fully integrated CMOS on-chip bandpass filter are classified into 1) the component level (i.e., active inductor, Q-enhanced passive inductor, negative resistance cancellation), and 2) the circuit level (i.e., adding transmission zeros on stopband, applying the zigzag technique for fewer inductors, superposition of different resonators). The demand for monolithic designs for portable devices attracts market interest in a fully integrated CMOS on-chip bandpass filter. Optimized minimal inductors (OMI) bandpass filter is a good platform for use in both active and passive bandpass filters, mainly because 1) it provides good stopband rejection for high interface attenuation, and 2) the number of inductors is fewer than conventional bandpass filters (i.e., Chebyshev/Chebyshev inverse, elliptic), which significantly reduces power consumption, noise, and silicon area. A calibration methodology of the optimized minimum inductor bandpass filter is presented at a specific center frequency to enable controllability on bandwidth and stopband rejection. The calibration flow is optimized to offset the inaccuracy of center frequency, bandwidth, and stopband rejection caused by the discrepancy between the actual and ideal prototype passive spiral inductors and MIM capacitors. Two OMI BPF designs before and after calibration are presented for demonstration and comparison. They are 1) a 3rd order centered at 2.388 GHz, 35.54% fractional bandwidth (FBW), 29.97 dB stopband rejection, and 2) a 7th order centered at 2.333 GHz, 17.40% FBW, 62.29 dB stopband rejection. Like other conventional BPF, the OMI BPF still suffers insertion loss at passband in the trade-off of good selectivity. The 3rd order OMI BPF has 5dB loss at the center frequency, and the 7th order has 25 dB loss. A 22 dB gain, 6 dB noise figure, low-noise high-gain amplifier operating from 1.5 GHz to 3.8 GHz is designed and connected to the OMI BPF to compensate for the BPF degenerated in-band loss. The three-stage low noise amplifier (LNA) consists of a gm-boosted common gate amplifier and a current-reuse stage. The common gate amplifier provides good impedance matching. The current-reuse stage saves the total power of LNA to 5.85 mW, reduces the common gate noise, and achieves a high gain.
Chien-In Henry Chen, Ph.D. (Advisor)
Marian K Kazimierczuk, Ph.D. (Committee Member)
Yan Zhuang, Ph.D. (Committee Member)
Saiyu Ren, Ph.D. (Committee Member)
Ray Siferd, Ph.D. (Committee Member)
139 p.

Recommended Citations

Citations

  • Wang, Y. (2021). Design and Implementation of Fully Integrated CMOS On-chip Bandpass Filter with Wideband High-Gain Low Noise Amplifier [Doctoral dissertation, Wright State University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=wright1629373771035261

    APA Style (7th edition)

  • Wang, Yu. Design and Implementation of Fully Integrated CMOS On-chip Bandpass Filter with Wideband High-Gain Low Noise Amplifier. 2021. Wright State University, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=wright1629373771035261.

    MLA Style (8th edition)

  • Wang, Yu. "Design and Implementation of Fully Integrated CMOS On-chip Bandpass Filter with Wideband High-Gain Low Noise Amplifier." Doctoral dissertation, Wright State University, 2021. http://rave.ohiolink.edu/etdc/view?acc_num=wright1629373771035261

    Chicago Manual of Style (17th edition)