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Modeling the Role of Plating Additives in the Metallization of Semiconductor Interconnects: From Dual Damascene to Through Silicon Vias

Adolf, James

Abstract Details

2011, Doctor of Philosophy, Case Western Reserve University, Chemical Engineering.

Metallization of semiconductor interconnects by copper electroplating has been the standard industry practice for over ten years. The technology hinges on a special plating additives mixture, formulated empirically, that enables bottom-up metallization. Further extensions of the technology, to dual damascene features smaller than 22 nm, and at the other extreme, to the more challenging, micron scale, through silicon vias (TSV’s), hinge on the ability to quantitatively model and optimize the process. The goal of this work is to provide a straightforward, predictive model that applies to the metallization by plating on all feature scales, which will enable the optimization and extension of the process. A critical analysis of the TSV fill process is carried out, focusing on the challenges and differences in scaling from the dual-damascene nanoscale process. A comprehensive and predictive model for the bottom up plating, taking into account additives and copper transport, time-dependent competitive adsorption of the additives including their effect on the plating process, and the effect of the changing geometry and surface area due to plating, has been developed. Limitations associated with the widely varying scales are critically analyzed and corrections to the model accounting for transport limitations of both additives and copper in the relatively large TSV scale are provided.

The utilization of the model to provide optimal additives concentrations for bottom-up fill of dual damascene scale features is demonstrated. Further, a model for the critical influence of a special class of nitrogen-based additives (the so-called ‘levelers’) on TSV’s fill is provided. Analytical treatment of migration effects due to the electrical field on ionic transport in stagnant media for general electrochemical systems is provided. Application of this analysis to the bottom-up fill process indicates that the copper transport limitations and depletion are far more significant than the ohmic effects, and hence, particularly in larger features such as those encountered in TSV’s, the use of supporting electrolyte should be minimized. A method is developed to experimentally determine the multiple, coupled additive parameters required for the application of the model, and a systematic approach for the screening of additives expected to provide superior fill is provided. A millifluidics experimental systems was developed that automates this analysis and provides superior experimental data. Commonly used additives (Polyethylene glycol (PEG), a plating suppressor, and bis-(3-sulfopropyl) disulfide (SPS), a plating accelerator) were analyzed and their adsorption and transport parameters determined. Throughout the thesis, a complete fill model is developed as well as the necessary tools to characterize and screen additives in order to achieve void free bottom-up fill in TSVs.

Uziel Landau (Committee Chair)
J. Adin Mann (Committee Member)
Heidi Martin (Committee Member)
Arthur Heuer (Committee Member)
Robert Preisser (Committee Member)
363 p.

Recommended Citations

Citations

  • Adolf, J. (2011). Modeling the Role of Plating Additives in the Metallization of Semiconductor Interconnects: From Dual Damascene to Through Silicon Vias [Doctoral dissertation, Case Western Reserve University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=case1305562499

    APA Style (7th edition)

  • Adolf, James. Modeling the Role of Plating Additives in the Metallization of Semiconductor Interconnects: From Dual Damascene to Through Silicon Vias. 2011. Case Western Reserve University, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=case1305562499.

    MLA Style (8th edition)

  • Adolf, James. "Modeling the Role of Plating Additives in the Metallization of Semiconductor Interconnects: From Dual Damascene to Through Silicon Vias." Doctoral dissertation, Case Western Reserve University, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=case1305562499

    Chicago Manual of Style (17th edition)