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FPGA IMPLEMENTATION OF A PARALLEL EBCOT TIER-1 ENCODER THAT PRESERVES ENCODING EFFICIENCY

Damecharla, Hima Bindu
http://rave.ohiolink.edu/etdc/view?acc_num=akron1149703842

Abstract Details

2006, Master of Science, University of Akron, Electrical Engineering.
Embedded block coding with optimized truncation (EBCOT) Tier-1 is the most computationally intensive part of the JPEG2000 image coding standard. Past research on fast EBCOT Tier-1 hardware implementations has concentrated on cycle-efficient context formation, and achieved improved throughput at the cost of reduced encoding efficiency. In this thesis, a new fast EBCOT Tier-1 design called the Split Arithmetic Encoder (SAE) is presented. The proposed process exploits concurrency to obtain improved throughput with a lower penalty in encoding efficiency. As opposed to past research which concentrates on either context formation or arithmetic encoding, the design presented is for a complete EBCOT Tier-1 process, and considers system-level issues such as the need for buffering. A hardware architecture for the proposed process was developed, realized in VHDL, and synthesized for implementation on an Altera field programmable gate array. Functionality of the architecture is verified by simulating the system in Modelsim 6.0 for sixteen standard test images and comparing the resulting streams of symbol/context pairs and embedded bit-streams to expected outputs generated using a Matlab simulation. Results show, on average, a 55% improvement in processing time for the proposed architecture over a serial architecture for the set of sixteen standard test images.
Joan Carletta (Advisor)
125 p.
FPGA; EBCOT; JPEG2000; Context Formation; Arithmetic Encoding

Recommended Citations

Citations

  • Damecharla, H. B. (2006). FPGA IMPLEMENTATION OF A PARALLEL EBCOT TIER-1 ENCODER THAT PRESERVES ENCODING EFFICIENCY [Master's thesis, University of Akron]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=akron1149703842

    APA Style (7th edition)

  • Damecharla, Hima. FPGA IMPLEMENTATION OF A PARALLEL EBCOT TIER-1 ENCODER THAT PRESERVES ENCODING EFFICIENCY. 2006. University of Akron, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=akron1149703842.

    MLA Style (8th edition)

  • Damecharla, Hima. "FPGA IMPLEMENTATION OF A PARALLEL EBCOT TIER-1 ENCODER THAT PRESERVES ENCODING EFFICIENCY." Master's thesis, University of Akron, 2006. http://rave.ohiolink.edu/etdc/view?acc_num=akron1149703842

    Chicago Manual of Style (17th edition)

akron1149703842
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© 2006, all rights reserved.
This open access ETD is published by University of Akron and OhioLINK.