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HARDWARE TROJAN ATTACKS: THREAT ANALYSIS AND LOW-COST COUNTERMEASURES THROUGH GOLDEN-FREE DETECTION AND SECURE DESIGN

Wang, Xinmu
http://rave.ohiolink.edu/etdc/view?acc_num=case1378489509

Abstract Details

2014, Doctor of Philosophy, Case Western Reserve University, EECS - Computer Engineering.
Due to multiple untrusted components in integrated circuits (ICs) life cycle, malicious modifi cations of integrated circuits in design houses or foundries have emerged as a major security threat. Such modifi cations, popularly referred to as Hardware Trojan attacks, are extremely difficult to detect during manufacturing test. E ffectiveness of traditional logic testing and side-channel analysis based detection approaches are limited by their capability in meeting complex Trojan trigger conditions and the masking eff ect due to large process variations, respectively. In this thesis, we analyze hardware Trojan attacks of various forms from both an attacker's and a defender's perspectives, with the final goal of developing e ffective defense mechanisms to thwart Trojan attacks and protect ICs security. From an attacker's point of view, we explore the design space of hardware Trojan by developing innovative and efficient Trojan design techniques at di fferent stages of IC development. Hardware Trojans are designed and implemented to cause system malfunction and critical information leakage. Novel circuit level design techniques are investigated for minimizing Trojan side-channel fingerprint. A new class of hardware Trojans is proposed that can be mounted in Static-Random-Access Memories (SRAMs) to tamper data integrity in embedded memories (e.g. processor cache), which also validates the feasibility of mounting general hardware Trojan attacks in foundries by manipulating design layouts. As eff ective defense measures, we propose two robust side-channel analysis based Trojan detection approaches that do not require a golden IC instance thus eliminate process noises. Finally, as a Design-for-Security (DfS) technique, the concept of Infrastructure IP for Security (IIPS) is proposed and implemented to provide comprehensive protections against various forms of hardware attacks. Both circuit-level simulations and experimental results are provided demonstrate the effectiveness of the countermeasures at modest hardware overhead.
Swarup Bhunia (Advisor)
Christos Papachristou (Committee Member)
Francis Merat (Committee Member)
Andy Podgurski (Committee Member)
165 p.
Computer Engineering
Hardware Trojan attack; threat analysis; golden-free detection; design-for-security

Recommended Citations

Citations

  • Wang, X. (2014). HARDWARE TROJAN ATTACKS: THREAT ANALYSIS AND LOW-COST COUNTERMEASURES THROUGH GOLDEN-FREE DETECTION AND SECURE DESIGN [Doctoral dissertation, Case Western Reserve University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=case1378489509

    APA Style (7th edition)

  • Wang, Xinmu. HARDWARE TROJAN ATTACKS: THREAT ANALYSIS AND LOW-COST COUNTERMEASURES THROUGH GOLDEN-FREE DETECTION AND SECURE DESIGN. 2014. Case Western Reserve University, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=case1378489509.

    MLA Style (8th edition)

  • Wang, Xinmu. "HARDWARE TROJAN ATTACKS: THREAT ANALYSIS AND LOW-COST COUNTERMEASURES THROUGH GOLDEN-FREE DETECTION AND SECURE DESIGN." Doctoral dissertation, Case Western Reserve University, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=case1378489509

    Chicago Manual of Style (17th edition)

case1378489509
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© 2013, some rights reserved.Creative Commons License HARDWARE TROJAN ATTACKS: THREAT ANALYSIS AND LOW-COST COUNTERMEASURES THROUGH GOLDEN-FREE DETECTION AND SECURE DESIGN by Xinmu Wang is licensed under a Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported License. Based on a work at etd.ohiolink.edu.
This open access ETD is published by Case Western Reserve University School of Graduate Studies and OhioLINK.