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ELECTRICAL CHARACTERIZATION OF SiC JFET-BASED INTEGRATED CIRCUITS

Soong, Chia-Wei
http://rave.ohiolink.edu/etdc/view?acc_num=case1386674317

Abstract Details

2014, Doctor of Philosophy, Case Western Reserve University, EECS - Electrical Engineering.
6H-SiC, n- channel, depletion-mode JFET-based devices and integrated circuits for high temperature sensing applications have been studied extensively in this dissertation. To further understand the performance of basic integrated circuit building blocks at the wafer-scale, as well as the limitations of 6H-SiC technology, key electrical parameters of various devices have been studied from room temperature up to 600 oC. Integrated circuits, including digital logic gates and analog amplifiers, have also been demonstrated at elevated temperatures, the latter enabling sensor interface capability. A uniformity study of 229 JFETs' on- and off-state parameters across a 2 inch-diameter wafer, consisting of varying W/L ratios within each die, showed an overall yield of ~93%. The coefficient of variance for the measured on-state parameters was relatively small at tested operating temperatures from room to 280 oC; it did however increase with the die distance from the wafer center. Orders of magnitude variations in the off-state gate reverse current at room temperature suggests poor uniformity of crystalline quality across the wafer. Off-state drain leakage current also exhibited large variations across the wafer. Nevertheless, an on/off current ratio > 182 was seen across the wafer at 280 oC. The 6H-SiC core inverter has an outstanding DC characteristic transfer function with a steep slope, including a gain > 20 from room temperature to 500 oC, and a logic threshold well centered in the logic swing. NOR and NAND gates were likewise tested in this temperature range, with the measured dynamic characteristics presented. A high-temperature, fully monolithic, high gain-bandwidth 6H-SiC transimpedance amplifier for capacitive sensor interfacing was tested. The amplifier demonstrated a gain of 235 kohm and a bandwidth of 0.61 MHz at room temperature. The gain and bandwidth were 774 kohm and 0.17 MHz at 450 oC, respectively. Results from measurements with variable capacitors - simulating sensor capacitance - confirmed differential capacitive sensing at room operating temperatures to 450 oC. The voltage noise performance of integrated differential amplifiers fabricated in this process was studied from room temperature to 500oC. A noise dependence of 1/fr (where 1 < r < 2) was seen across different types of differential amplifiers. A universal noise behavior was not observed in the differential amplifiers, even among the same circuit topology, which suggests the existence of defects in the epitaxial layer or substrate. Parasitic p-n diodes were investigated, and the I-V characteristics were found to vary from sample to sample. A well-behaved p-n junction was further characterized, and an ideality factor of 2 with a thermal activation energy of 1.21 eV was shown, which suggests generation-recombination current dominance. Due to the superior material properties of 4H-SiC over 6H-SiC and the non-availability of 6H-SiC wafers, a process technology conversion from 6H- into 4H-SiC is suggested, including initial simulations of enhanced circuit performance expectations.
Mehran Mehregany (Committee Chair)
Pedram Mohseni (Committee Member)
Swarup Bhunia (Committee Member)
Mark De Guire (Committee Member)
Electrical Engineering

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Citations

  • Soong, C.-W. (2014). ELECTRICAL CHARACTERIZATION OF SiC JFET-BASED INTEGRATED CIRCUITS [Doctoral dissertation, Case Western Reserve University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=case1386674317

    APA Style (7th edition)

  • Soong, Chia-Wei. ELECTRICAL CHARACTERIZATION OF SiC JFET-BASED INTEGRATED CIRCUITS . 2014. Case Western Reserve University, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=case1386674317.

    MLA Style (8th edition)

  • Soong, Chia-Wei. "ELECTRICAL CHARACTERIZATION OF SiC JFET-BASED INTEGRATED CIRCUITS ." Doctoral dissertation, Case Western Reserve University, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=case1386674317

    Chicago Manual of Style (17th edition)

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This open access ETD is published by Case Western Reserve University School of Graduate Studies and OhioLINK.