Multiple context processor (mcp) architectures increase performance and reduce overhead by reducing the frequency of full context switches. In this study we accomplish this through hardware support for interprocess communication (IPC) and scheduling. Conventional scheduling techniques for single context processors do not adapt well to multiple context platforms. We present a new scheduling algorithm designed for multiple context processors which utilize information about task interaction between independent tasks (interprocess communication) to more efficiently schedule tasks on a mcp architecture, called IPC directed scheduling. Simulation of the processor using software to simulate processor hardware was used to explore the efficacy of our design. Experimental results demonstrate the improved performance of mcp architectures over single context processors, and of IPC directed scheduling compared with conventional scheduling techniques.