This dissertation has discussed various means and techniques to improve mixed- signal testing of analog integrated systems in an industrial environment. It covers a number of practical techniques ranging from component verification, statistical fault detection, and optimum test point selection to innovative use of IEEE boundary scan techniques.
A method to perform the equivalent of In-Circuit Test (ICT) as part of the End-Of- Line Test during manufacturing of modules is investigated. The experiment proves that the ICT stage in a manufacturing line can be effectively eliminated for certain modules. This is important, as future modules are expected to pose access problems for ICT probes.
A procedure to test analog circuits using the Mahalanobis distance (MD) is proposed. The proposed methods can be automated in performing fault simulation and in constructing the fault dictionary. They provide robust statistical models for fault detection with good separation properties and simplified representation. The frequency application uses a proper metric to measure the characteristics of analog frequency response. The AR model in the time domain essentially accomplishes a frequency sweep up to two times the sampling frequency. It also reduces the dimension of the MD measures.
A fast algorithm for test point selection is proposed. The proposed approach is based on the entropy measure. It provides an algorithm faster than previously developed approaches and has fewer selected nodes than most of them. The selection method is applicable in other areas (for instance in information systems), where a quality of selection can be established using system entropy.
The feasibility study of using digital sequence in analog components testing is conducted. The analog information can be stored in a sequential digital registers and be shifted out for evaluation. The proposed methodology has a special practical value in testing those limited analog components on PCB board along with IEEE std. 1149.1.
Finally, an analog boundary scan bus (ABSB) is proposed for observing analog function blocks. The proposed ABSB can be used as a subset of IEEE P1149.4 for a virtual probe. The proposed ABSB is compared with IEEE P1149.4 by simulation examples. It is concluded that a boundary scan bus has its limitations for high frequency applications.