Skip to Main Content
 

Global Search Box

 
 
 
 

Files

File List


osu1073617255.pdf (2.38 MB)

ETD Abstract Container

Abstract Header

Design of analog baseband circuits for wireless communication receivers

Yoo, Seoung Jae
http://rave.ohiolink.edu/etdc/view?acc_num=osu1073617255

Abstract Details

2004, Doctor of Philosophy, Ohio State University, Electrical Engineering.
This dissertation describes the design and implementation of analog baseband filter and variable gain amplifiers (VGA) for wireless communication receivers. Since discrete high-Q image rejection and IF filters are eliminated, fully integrated receiver architecture demands baseband filters and VGAs which exhibit high linearity and wide dynamic range. In this dissertation, baseband chains for WLAN receivers and base station application, and low voltage transresistance based filter and VGA are presented. For WLAN receiver, three different baseband chains are introduced in chapter 3. First baseband chain is designed based on the feed forward compensated amplifier. Since the amplifier demonstrates high gain bandwidth and phase margin, the operation of filter is not affected by phase error and finite gain bandwidth of the amplifier. The feedforward compensated amplifier based filter and VGA are fabricated in 0.5u CMOS technology and measured. Second baseband chain is designed based on fully differential buffer. The fully differential buffer shows the characteristics such as wide bandwidth, low output impedance, and high linearity, which are required in the design of wideband filter. Since identical buffer circuits are applied for the design of filter and VGA, design and optimization time are saved. This baseband chain is fabricated in 0.18u CMOS technology and test results are presented. Third baseband chain is designed based on the differential amplifier. The DDA is used to implement wide band width buffer and folded cascode amplifier is used to design variable gain amplifier. The VGA of this baseband chain is fabricated in 0.5u CMOS technology and tested. In chapter 4, the band pass filter and VGA for basestation are presented. Since base station requires strong linearity and power compression behavior, the baseband chain must demonstrate high linearity and wide dynamic range. To achieve required linearity, power consumption is increased and the use of nonlinear components is minimized. Seven filter blocks and five attenuators are cascaded for the realization of the baseband chain. The baseband chain is fabricated in 0.5u CMOS technology. Finally, in chapter 5, the design of low voltage transresistance amplifier is presented. The amplifier is operated with 1.8 V supply in 5 V CMOS technology. The amplifier is implemented to design Tow-Thomas filter and R2R ladder based VGA. The amplifier and VGA are fabricated in 0.5u CMOS technology and tested.
Mohammed Ismail ElNaggar (Advisor)
167 p.
VGA; baseband filter

Recommended Citations

Citations

  • Yoo, S. J. (2004). Design of analog baseband circuits for wireless communication receivers [Doctoral dissertation, Ohio State University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=osu1073617255

    APA Style (7th edition)

  • Yoo, Seoung Jae. Design of analog baseband circuits for wireless communication receivers. 2004. Ohio State University, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=osu1073617255.

    MLA Style (8th edition)

  • Yoo, Seoung Jae. "Design of analog baseband circuits for wireless communication receivers." Doctoral dissertation, Ohio State University, 2004. http://rave.ohiolink.edu/etdc/view?acc_num=osu1073617255

    Chicago Manual of Style (17th edition)

osu1073617255
10,708
© 2004, all rights reserved.
This open access ETD is published by The Ohio State University and OhioLINK.