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System and circuit design techniques for WLAN-enabled multi-standard receiver

Zhang, Ling
http://rave.ohiolink.edu/etdc/view?acc_num=osu1131432639

Abstract Details

2005, Doctor of Philosophy, Ohio State University, Electrical Engineering.
As 2G digital cellular standards, were only oriented to delivering of speech and low bit-rate data services, the need to support broadband multimedia services over wireless infrastructure drives the development of 3G air interfaces. With the increasing popularity of WLAN, a WLAN-enabled mobile phone, which will not only transfer voice and multimedia data but also access Internet wherever possible, outlines the scenario of 4G mobile systems. An exploration of WLAN-enabled multi-standard wireless receiver, which covers GSM900, WCDMA and WiFi standards, is described in this dissertation. In this triple-standard receiver, a low-IF (100 kHz) architecture is used for GSM to reduce the DC offset problem and relax the image rejection requirement while a Zero-IF architecture has been used for the other two standards. Three RF filters are used to select appropriate signal bands. Due to the proximity of WCDMA and WiFi bands, LNA and mixer are shared between them, but a second LNA and mixer is necessary for GSM operation. Baseband components, including DC-notch filter, poly-phase filter, VGA and ADC, are shared among the three standards. The system level design specifications for these three standards are derived and then distributed among the building blocks in the receiver chain. The block level specifications form the guideline in designing each building block. To use a single ADC to cover multiple cellular and WLAN standards is a challenge, since the channel bandwidth are widely spread in those standards (channel bandwidths are 200kHz in GSM, 3.84MHz in WCDMA and 22MHz in WiFi). A multi-standard Sigma-Delta modulator is proposed. According to the different signal bandwidth and Dynamic Range specifications, this ADC can be reconfigured to achieve the required dynamic range with less power consumption. It employs cascade 2-1-1-1 architecture with multi-bit quantizer as a backbone. Zeros of NTF are reconfigured in WiFi mode to further suppress the in-band quantization noise. The prototype is designed and implemented in TSMC 0.18um CMOS process with 1.8V power supply. It achieves SNDR of 82dB, 75dB and 58dB for GSM, WCDMA and WiFi modes respectively. It can also be used for other standards (e.g. Bluetooth and IEEE 802.11a) without any modification.
Mohammed Ismail EL-Naggar (Advisor)
GSM; ADC; WCDMA; ¿¿¿¿¿¿lters; OTA; modulator

Recommended Citations

Citations

  • Zhang, L. (2005). System and circuit design techniques for WLAN-enabled multi-standard receiver [Doctoral dissertation, Ohio State University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=osu1131432639

    APA Style (7th edition)

  • Zhang, Ling. System and circuit design techniques for WLAN-enabled multi-standard receiver. 2005. Ohio State University, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=osu1131432639.

    MLA Style (8th edition)

  • Zhang, Ling. "System and circuit design techniques for WLAN-enabled multi-standard receiver." Doctoral dissertation, Ohio State University, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=osu1131432639

    Chicago Manual of Style (17th edition)

osu1131432639
9,055
© 2005, all rights reserved.
This open access ETD is published by The Ohio State University and OhioLINK.