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roshan_thesis_OhioLINK_614.pdf (1.83 MB)

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Asynchronous Physical Unclonable Function using FPGA-based Self-Timed Ring Oscillator

Silwal, Roshan
http://rave.ohiolink.edu/etdc/view?acc_num=toledo1371088101

Abstract Details

2013, Master of Science in Electrical Engineering, University of Toledo, College of Engineering.
Field Programmable Gate Array (FPGA) security has emerged as a challenging security paradigm in system design. Systems implemented on FPGAs require secure operations and communication. There is a growing concern over the security attributes of FPGAs regarding protecting and securing information processed within them, protecting designs during distribution and protecting intellectual property rights. One of the important aspects of improving the trustworthiness level of FPGAs is enhancing the physical security of FPGAs. A Physical Unclonable Function (PUF) provides a means to enhance physical security of Integrated Circuits (ICs) against piracy and unauthorized access. PUFs exploit the inherent and embedded randomness that occurs during the fabrication process of silicon devices. This thesis presents a novel FPGA-based PUF design technique using asynchronous logic. Significant process variations exist in IC fabrication, which makes each IC unique in its delay characteristics. The statistical delay variation in transistors and wires across FPGA chips is exploited through identically laid-out asynchronous ring oscillators. The asynchronous ring oscillators generate oscillations of varying frequencies when the oscillators are identically mapped on a semiconductor device. These varying frequencies produced by identically mapped self-timed ring oscillators are used to generate unique PUF response bits, which are used in device authentication and cryptographic applications such as generating secret keys and True Random Number Generator (TRNG). Experimental analysis shows that asynchronous oscillators of PUFs generate oscillations of varying frequencies, and the uniqueness for the PUF responses is 49.92%, which is very close to the desired 50% factor.
Mohammed Niamat (Committee Chair)
Robert C Green, II (Committee Member)
Weiqing Sun (Committee Member)
113 p.
Computer Engineering; Electrical Engineering
FPGA; STRO-PUF; Physical Unclonable Function; PUF; Self-Timed Ring Oscillator; Hardware Cryptography; Asynchronous Logic; Asynchronous Ring Oscillator

Recommended Citations

Citations

  • Silwal, R. (2013). Asynchronous Physical Unclonable Function using FPGA-based Self-Timed Ring Oscillator [Master's thesis, University of Toledo]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1371088101

    APA Style (7th edition)

  • Silwal, Roshan. Asynchronous Physical Unclonable Function using FPGA-based Self-Timed Ring Oscillator. 2013. University of Toledo, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=toledo1371088101.

    MLA Style (8th edition)

  • Silwal, Roshan. "Asynchronous Physical Unclonable Function using FPGA-based Self-Timed Ring Oscillator." Master's thesis, University of Toledo, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1371088101

    Chicago Manual of Style (17th edition)

toledo1371088101
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© 2013, all rights reserved.
This open access ETD is published by University of Toledo and OhioLINK.