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Thesis Shankar Dhakal.pdf (2.1 MB)

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Circuit Level Reliability Considerations in Wide Bandgap Semiconductor Devices

Dhakal, Shankar
http://orcid.org/0000-0002-5163-8966
http://rave.ohiolink.edu/etdc/view?acc_num=toledo1532703747534188

Abstract Details

2018, Master of Science, University of Toledo, Electrical Engineering.
The recent development in the wide bandgap (WBG) semiconductor devices such as gallium nitride (GaN) has pushed the limit for the next generation power electronics in terms of high frequency switching applications with high power density. GaN devices have shown promising theoretical advantages such as large bandgap, breakdown field and electron saturation velocity, thereby presenting GaN as an effective alternative for Silicon in high power, temperature and frequency switching applications. Despite having numerous advantages over silicon, GaN technology has suffered with various device level as well as circuit level challenges. Although the very low inherent capacitance of the GaN is one of the most important attributes of the device, it can become disruptive in the presence of significant parasitic circuit inductance. Due to the high sensitivity of these capacitances and their interaction with the parasitic circuit components, undesirable transient events resulting in circuit deterioration can occur. In this thesis work, circuit level reliability issues of GaN due to high VGS stress and high frequency switching has been analyzed with emphasis on external circuit parasitics. The research study targets three important aspects of circuit level reliability issues in a GaN HEMT. It begins with 1. determination of degradation parameters, followed by 2. effect of external gate resistance over degradation parameters and finally 3. analysis of device degradation mechanism with respect to high VGS stress under zero input bias (VDS = 0). A simulation study is also developed to predict the VGS overshoot for a specific gate voltage with respect to parasitic inductance. For this purpose, a 100 V, “EPC-8010” normally off GaN HEMT has been modeled and utilized in SaberRD environment. The VGS overshoot obtained from SaberRD model are then verified with experimental results. In conjunction, a boost converter has been designed and built for experimentation to assess the degradation mechanism in the device. As a part of the experiment, frequency sweep, time stress and DC gate bias tests have been performed to scrutinize the degradation parameters of the device. In addition, degraded GaN devices have been re-tested in the frequency sweep test to analyze the recovery behavior of the device. The results have revealed a close relationship between VGS overshoot, gate current and efficiency pre, post and during degradation which can be very useful to develop a probabilistic model to predict the device failure.
Raghav Khanna (Committee Chair)
Mansoor Alam (Committee Member)
Richard Molyet (Committee Member)
86 p.
Electrical Engineering
Reliability; WBG; Wide Bandgap; High frequency switching; parasitic inductance; Overshoot; Gate Resistance; GaN HEMT

Recommended Citations

Citations

  • Dhakal, S. (2018). Circuit Level Reliability Considerations in Wide Bandgap Semiconductor Devices [Master's thesis, University of Toledo]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1532703747534188

    APA Style (7th edition)

  • Dhakal, Shankar. Circuit Level Reliability Considerations in Wide Bandgap Semiconductor Devices. 2018. University of Toledo, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=toledo1532703747534188.

    MLA Style (8th edition)

  • Dhakal, Shankar. "Circuit Level Reliability Considerations in Wide Bandgap Semiconductor Devices." Master's thesis, University of Toledo, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1532703747534188

    Chicago Manual of Style (17th edition)

toledo1532703747534188
667
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This open access ETD is published by University of Toledo and OhioLINK.