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DEVELOPMENT OF PROCESS VARIATION TOLERANT STANDARD CELLS

THAKORE, PRIYANKA
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1176841201

Abstract Details

2007, MS, University of Cincinnati, Engineering : Electrical Engineering.
ASIC design using standard cell library cells is the most widespread design method. Lower process technologies drive a need to incorporate Design for Manufacturability technique early in the design flow. In the thesis, this is achieved by developing variation tolerant standard cell library embedded in the current design °ow. This design technique can help cut down the time penalty due to re-spin and incorporates DFM at the pre-layout stage. We present a framework to develop the process variation-tolerant standard cell library and implement them in creating robust designs. In this work, we build performance macro models based on the relative variation in the various parameters like width, oxide thickness, threshold voltage etc., for each transistor in the standard cell. A novel approach is taken to model these parameter variations and the standard cells are optimized for intrinsic delay, power and area using reduced dimension response surface technique. A DFM (Design for Manufacturability) Library is developed with the various views needed for integration with the standard VLSI Design °ow. This method is analyzed by subjecting designs, which are synthesized with un-optimized and the DFM library Cells, to parameter variations. Results show an improvement in the critical path slack in the order of 314% (3X) for the largest benchmark circuit and average of 15% for the small and medium sized circuits in presence of variation. This thesis work lays the foundation for achieving reliable parametric variation tolerant designs rendering significant changes to the current design flow.
Dr. Ranga Vemuri (Advisor)
150 p.
DFM; DFY; Standard Cell; Process Variation; library characterization

Recommended Citations

Citations

  • THAKORE, P. (2007). DEVELOPMENT OF PROCESS VARIATION TOLERANT STANDARD CELLS [Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1176841201

    APA Style (7th edition)

  • THAKORE, PRIYANKA. DEVELOPMENT OF PROCESS VARIATION TOLERANT STANDARD CELLS. 2007. University of Cincinnati, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1176841201.

    MLA Style (8th edition)

  • THAKORE, PRIYANKA. "DEVELOPMENT OF PROCESS VARIATION TOLERANT STANDARD CELLS." Master's thesis, University of Cincinnati, 2007. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1176841201

    Chicago Manual of Style (17th edition)

ucin1176841201
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© 2007, all rights reserved.
This open access ETD is published by University of Cincinnati and OhioLINK.