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Tabu search algorithm for a thermal aware VLSI floorplanning application

Iyer, Krishnakumar R
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1384426610

Abstract Details

2013, MS, University of Cincinnati, Engineering and Applied Science: Electrical Engineering.
Every new process technology results in an increase in power density on chips. The cost of keeping the temperature of the chip low enough to sustain a high reliability increases consequently. Apart from the power and thermal effects associated with each functional block, the placement of the blocks affects the creation of thermal hotspots and reduces the reliability of the chip. Apart from the area and wire length based quality evaluation of a good floorplan, thermal penalties need to be taken into account. This thesis implements the tabu search algorithm for a thermal aware version of the VLSI floorplanning problem by employing diversification techniques to achieve global optima and strategies called intensification technique to determine the best solutions at a local level. We use these techniques and leverage the memory enabled tabu search to reduce the search space not only for placement of the blocks but also evaluation of the shapes and aspect ratios and thermal effects of the blocks in the floorplan. The additional constraint of geometry associated with the floorplanning problem, which differentiates it from the placement problem is represented using a B* tree data structure. Randomization for short and long term memory of the tabu lists and in the moves enables the algorithm to perform hill climbing and prevents it from being stuck at a local optimum and allows it to aspire to a global optimum. We use the MCNC benchmarks as the inputs to our experiment. The project requires a tool to evaluate the thermal effects of a floorplan. We use a tool called Hotspot, developed by the University of Virginia, to evaluate thermal costs. Hotspot is an accurate thermal modeling tool extensively used in architectural modeling. Its main benefit is its compatibility with power models often used in the computer architecture academic community.
Carla Purdy, Ph.D. (Committee Chair)
Raj Bhatnagar, Ph.D. (Committee Member)
Wen Ben Jone, Ph.D. (Committee Member)
69 p.
Electrical Engineering
Hotspot; Floorplanning; Thermal awareness; MCNC; Tabu search

Recommended Citations

Citations

  • Iyer, K. R. (2013). Tabu search algorithm for a thermal aware VLSI floorplanning application [Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1384426610

    APA Style (7th edition)

  • Iyer, Krishnakumar. Tabu search algorithm for a thermal aware VLSI floorplanning application. 2013. University of Cincinnati, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1384426610.

    MLA Style (8th edition)

  • Iyer, Krishnakumar. "Tabu search algorithm for a thermal aware VLSI floorplanning application." Master's thesis, University of Cincinnati, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1384426610

    Chicago Manual of Style (17th edition)

ucin1384426610
648
© 2013, all rights reserved.
This open access ETD is published by University of Cincinnati and OhioLINK.