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A Hardware Implementation of Hough Transform Based on Parabolic Duality

Ramesh, Naren
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1396530960

Abstract Details

2014, MS, University of Cincinnati, Engineering and Applied Science: Electrical Engineering.
Hough Transform is a pattern recognition tool commonly used in many image processing algorithms. The detection of straight lines is the core to most of these applications. Over the years, many Hough Transform implementations have been proposed to reduce its computational overhead and also for detecting other patterns, i.e., curves and circles. The one problem that still remains fundamental to the original form of the Hough Transform with respect to straight line detection is its inability to detect vertical lines. This has forced the algorithm to use the parametric form rather than the parabolic form for straight lines in most cases. This thesis works on developing a method to overcome this drawback by incorporating two different forms of the slope intercept equation of a line, one using the regular form to detect lines with slopes less than 1 and the other by rotating the axis by 90 degrees to detect lines with a slope greater than 1 or infinity. We also consider a reflection of the input data points, which would mean the slope in the accumulator grid needs to be set only from 0 to 1. This makes sure the calculated values use relatively lesser memory for high precision. We maintain a [0,1] x [-1,1] accumulator grid to keep all our calculations within bounds. Over the last decade, Field Programmable Gate Arrays (FPGAs) have become a widely popular hardware implementation tool due to their low cost and reconfigurable nature. FPGAs are proving to be the front runner as the most favored hardware implementation platform. Thus, in this thesis we try to design a hardware model of our new algorithm on an FPGA device to determine its basic functionality with respect to computational overhead and accuracy. The new algorithm overcomes the difficulties of hardware implementation of the parametric form of Hough Transform by neglecting the use of CORDIC algorithms and trigonometric lookup tables, which only add extra overhead and loss of precision. In this project, we design our algorithm by building a synthesizable model using Verilog and the Altera Quartus II tool, which is useful in giving us an idea on the memory and device usage of the proposed algorithm. We compare our design with some of the other similar hardware implementations of the Hough Transform.
Carla Purdy, Ph.D. (Committee Chair)
Wen Ben Jone, Ph.D. (Committee Member)
George Purdy, Ph.D. (Committee Member)
64 p.
Electrical Engineering
Hough Transform; Line Detection; FPGA

Recommended Citations

Citations

  • Ramesh, N. (2014). A Hardware Implementation of Hough Transform Based on Parabolic Duality [Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1396530960

    APA Style (7th edition)

  • Ramesh, Naren. A Hardware Implementation of Hough Transform Based on Parabolic Duality. 2014. University of Cincinnati, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1396530960.

    MLA Style (8th edition)

  • Ramesh, Naren. "A Hardware Implementation of Hough Transform Based on Parabolic Duality." Master's thesis, University of Cincinnati, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1396530960

    Chicago Manual of Style (17th edition)

ucin1396530960
1,039
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This open access ETD is published by University of Cincinnati and OhioLINK.