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HIERARCHICAL EVOLUTION OF DIGITAL ARITHMETIC CIRCUITS

GOLLAMUDI, CHAKRAPANI
http://rave.ohiolink.edu/etdc/view?acc_num=ucin981480290

Abstract Details

2001, MS, University of Cincinnati, Engineering : Computer Engineering.
Traditional hardware is notorious for its inflexibility. It is impossible to change the hardware's structure and functions once it is made. However, most real-world problems are not fixed. They change with time. In order to deal with these problems efficiently and effectively, different hardware structures are necessary. EHW provides an ideal approach - making hardware "soft" by adapting the hardware structure to a problem dynamically. In contrast to conventional hardware, in which the structure is irreversibly fixed in the design process, evolvable hardware is designed to adapt, as the chameleon changes its color to blend in with the environment, through its ability to reconfigure its own hardware structure dynamically and autonomously. This capacity for adaptation is achieved by employing efficient search algorithms known as evolutionary algorithms to the design of electronic circuits. A major problem in the evolutionary design of combinational circuits is the problem of scale. This refers to the design of electronic circuits in which the number of gates required to implement the optimal circuit is too high to search the space of all designs in reasonable time, even by evolution. The reason is twofold: firstly, the size of the search space becomes enormous as the number of gates required to implement the circuit is increased, and secondly, the time required to calculate the fitness of a circuit grows as the size of the truth table of the circuit. This thesis studies the evolutionary design of combinational circuits in which the basic building blocks are small sub-circuits. A number of digital arithmetic circuits have been evolved using the digital modules as the basic building blocks. The evolution of these circuits was not feasible using the two-input gates as the basic building blocks. It has been shown that evolution of digital circuits using modules is faster, since the building blocks of the circuit are sub-circuits rather than two-input gates. This can also, be a disadvantage, since the number of gates of the evolved designs grows as the size of the modules used.
Dr. Dinesh Bhatia (Advisor)
75 p.
Computer Science
GENETIC ALGORITHMS; EVOLUTIONARY STRATEGIES; LEVELS-BACK; GENOTYPE-PHENOTYPE MAPPING; EVOLUTIONARY CYCLE

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Citations

  • GOLLAMUDI, C. (2001). HIERARCHICAL EVOLUTION OF DIGITAL ARITHMETIC CIRCUITS [Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin981480290

    APA Style (7th edition)

  • GOLLAMUDI, CHAKRAPANI. HIERARCHICAL EVOLUTION OF DIGITAL ARITHMETIC CIRCUITS. 2001. University of Cincinnati, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ucin981480290.

    MLA Style (8th edition)

  • GOLLAMUDI, CHAKRAPANI. "HIERARCHICAL EVOLUTION OF DIGITAL ARITHMETIC CIRCUITS." Master's thesis, University of Cincinnati, 2001. http://rave.ohiolink.edu/etdc/view?acc_num=ucin981480290

    Chicago Manual of Style (17th edition)

ucin981480290
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© 2001, all rights reserved.
This open access ETD is published by University of Cincinnati and OhioLINK.