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Hardware Security and VLSI Design Optimization

Xue, Hao
http://rave.ohiolink.edu/etdc/view?acc_num=wright1546466777397815

Abstract Details

2018, Doctor of Philosophy (PhD), Wright State University, Electrical Engineering.
Microelectronic circuit is ubiquitous component of modern electrical devices. The increasing complexity and professionality of phases in microelectronic supply chain bring more global cooperation to integrated circuit (IC) production. Therefore, providing a secure environment for microelectronic circuit design does not ensure the integrity of the hardware since any participator of IC fabrication has the opportunity to implant a malicious alteration in original IC design. Especially overseas chip-fabrication is a vital potential threat for national defense products. In theory, anyone who has access to fabrication process can tamper with the original design, with the potential to change function, modify parametric properties or even have confidential information transmitted to the attacker. The surreptitious modification of an IC is denoted as Hardware Trojan (HT). To address the issue of providing robust and reliable IC products, this dissertation proposes HT detection techniques which are based on HT activation and side-channel analysis. Simulation results show that the proposed technique can detect HT with areas that are 0.013% of the host-circuitry. Combinational use of multiple detection techniques will facilitate detection probability. Also, low power-delay-product (PDP) VLSI design is considered for optimizing parametric overhead of detection circuit. Simulation results indicate that the proposed VLSI design optimization techniques can improve PDP of dynamic and static CMOS circuits by up to 61.9% and 49.9%, respectively.
Saiyu Ren, Ph.D. (Advisor)
Ray Siferd, Ph.D. (Committee Member)
Marty Emmert, Ph.D. (Committee Member)
Marian Kazimierczuk, Ph.D. (Committee Member)
Yan Zhuang, Ph.D. (Committee Member)
144 p.
Electrical Engineering; Engineering
Microelectronic circuit; microelectronic supply chain; integrated circuit production; IC; Hardware Trojan; HT; VLSI design optimization; hardware security

Recommended Citations

Citations

  • Xue, H. (2018). Hardware Security and VLSI Design Optimization [Doctoral dissertation, Wright State University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=wright1546466777397815

    APA Style (7th edition)

  • Xue, Hao. Hardware Security and VLSI Design Optimization. 2018. Wright State University, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=wright1546466777397815.

    MLA Style (8th edition)

  • Xue, Hao. "Hardware Security and VLSI Design Optimization." Doctoral dissertation, Wright State University, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=wright1546466777397815

    Chicago Manual of Style (17th edition)

wright1546466777397815
617
© 2018, all rights reserved.
This open access ETD is published by Wright State University and OhioLINK.